In semiconductor fabrication, features may be filled with conductive materials. For example, copper is used for back end of line (BEOL) interconnects. However, copper interconnects are challenging to fabricate beyond the 7 nm technology node. Deposition of copper interconnects often involves first depositing a barrier layer. However, a barrier material which maintains its integrity as its thickness is scaled below 2.5 nm has not been identified. As the linewidth scales to 10 nm (at the 5 nm technology node), the barrier will consume 5 nm of the linewidth and more than 50% of the line cross-section, increasing the resistance exponentially with each technology node beyond 10 nm. Additionally, copper has an electron mean free path of about 39 nm. As a result, in small critical dimension features, electrons hit the sidewalls resulting in a less elastic collision. One alternative to copper interconnects is cobalt. Cobalt has an electron mean free path of about 6 nm and has low resistivity.